avionic design with actual uboot and tooling

submodule of avionic design uboot bootloader and with included tools to
get you started , read readme.md and readme-tk1-loader.md

u-boot/drivers/adc/Kconfig

@@ -0,0 +1,30 @@
+config ADC
+	bool "Enable ADC drivers using Driver Model"
+	help
+	  This enables ADC API for drivers, which allows driving ADC features
+	  by single and multi-channel methods for:
+	  - start/stop/get data for conversion of a single-channel selected by
+	    a number or multi-channels selected by a bitmask
+	  - get data mask (ADC resolution)
+	  ADC reference Voltage supply options:
+	  - methods for get Vdd/Vss reference Voltage values with polarity
+	  - support supply's phandle with auto-enable
+	  - supply polarity setting in fdt
+
+config ADC_EXYNOS
+	bool "Enable Exynos 54xx ADC driver"
+	help
+	  This enables basic driver for Exynos ADC compatible with Exynos54xx.
+	  It provides:
+	  - 10 analog input channels
+	  - 12-bit resolution
+	  - 600 KSPS of sample rate
+
+config ADC_SANDBOX
+	bool "Enable Sandbox ADC test driver"
+	help
+	  This enables driver for Sandbox ADC device emulation.
+	  It provides:
+	  - 4 analog input channels
+	  - 16-bit resolution
+	  - single and multi-channel conversion mode

u-boot/drivers/adc/Makefile

@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2015 Samsung Electronics
+# Przemyslaw Marczak <p.marczak@samsung.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_ADC) += adc-uclass.o
+obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
+obj-$(CONFIG_ADC_SANDBOX) += sandbox.o

u-boot/drivers/adc/adc-uclass.c

@@ -0,0 +1,409 @@
+/*
+ * Copyright (C) 2015 Samsung Electronics
+ * Przemyslaw Marczak <p.marczak@samsung.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+#include <adc.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ADC_UCLASS_PLATDATA_SIZE	sizeof(struct adc_uclass_platdata)
+#define CHECK_NUMBER			true
+#define CHECK_MASK			(!CHECK_NUMBER)
+
+/* TODO: add support for timer uclass (for early calls) */
+#ifdef CONFIG_SANDBOX_ARCH
+#define sdelay(x)	udelay(x)
+#else
+extern void sdelay(unsigned long loops);
+#endif
+
+static int check_channel(struct udevice *dev, int value, bool number_or_mask,
+			 const char *caller_function)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	unsigned mask = number_or_mask ? (1 << value) : value;
+
+	/* For the real ADC hardware, some ADC channels can be inactive.
+	 * For example if device has 4 analog channels, and only channels
+	 * 1-st and 3-rd are valid, then channel mask is: 0b1010, so request
+	 * with mask 0b1110 should return an error.
+	*/
+	if ((uc_pdata->channel_mask >= mask) && (uc_pdata->channel_mask & mask))
+		return 0;
+
+	printf("Error in %s/%s().\nWrong channel selection for device: %s\n",
+	       __FILE__, caller_function, dev->name);
+
+	return -EINVAL;
+}
+
+static int adc_supply_enable(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	const char *supply_type;
+	int ret = 0;
+
+	if (uc_pdata->vdd_supply) {
+		supply_type = "vdd";
+		ret = regulator_set_enable(uc_pdata->vdd_supply, true);
+	}
+
+	if (!ret && uc_pdata->vss_supply) {
+		supply_type = "vss";
+		ret = regulator_set_enable(uc_pdata->vss_supply, true);
+	}
+
+	if (ret)
+		error("%s: can't enable %s-supply!", dev->name, supply_type);
+
+	return ret;
+}
+
+int adc_data_mask(struct udevice *dev, unsigned int *data_mask)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+
+	if (!uc_pdata)
+		return -ENOSYS;
+
+	*data_mask = uc_pdata->data_mask;
+	return 0;
+}
+
+int adc_stop(struct udevice *dev)
+{
+	const struct adc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops->stop)
+		return -ENOSYS;
+
+	return ops->stop(dev);
+}
+
+int adc_start_channel(struct udevice *dev, int channel)
+{
+	const struct adc_ops *ops = dev_get_driver_ops(dev);
+	int ret;
+
+	if (!ops->start_channel)
+		return -ENOSYS;
+
+	ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
+	if (ret)
+		return ret;
+
+	ret = adc_supply_enable(dev);
+	if (ret)
+		return ret;
+
+	return ops->start_channel(dev, channel);
+}
+
+int adc_start_channels(struct udevice *dev, unsigned int channel_mask)
+{
+	const struct adc_ops *ops = dev_get_driver_ops(dev);
+	int ret;
+
+	if (!ops->start_channels)
+		return -ENOSYS;
+
+	ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
+	if (ret)
+		return ret;
+
+	ret = adc_supply_enable(dev);
+	if (ret)
+		return ret;
+
+	return ops->start_channels(dev, channel_mask);
+}
+
+int adc_channel_data(struct udevice *dev, int channel, unsigned int *data)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	const struct adc_ops *ops = dev_get_driver_ops(dev);
+	unsigned int timeout_us = uc_pdata->data_timeout_us;
+	int ret;
+
+	if (!ops->channel_data)
+		return -ENOSYS;
+
+	ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
+	if (ret)
+		return ret;
+
+	do {
+		ret = ops->channel_data(dev, channel, data);
+		if (!ret || ret != -EBUSY)
+			break;
+
+		/* TODO: use timer uclass (for early calls). */
+		sdelay(5);
+	} while (timeout_us--);
+
+	return ret;
+}
+
+int adc_channels_data(struct udevice *dev, unsigned int channel_mask,
+		      struct adc_channel *channels)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	unsigned int timeout_us = uc_pdata->multidata_timeout_us;
+	const struct adc_ops *ops = dev_get_driver_ops(dev);
+	int ret;
+
+	if (!ops->channels_data)
+		return -ENOSYS;
+
+	ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
+	if (ret)
+		return ret;
+
+	do {
+		ret = ops->channels_data(dev, channel_mask, channels);
+		if (!ret || ret != -EBUSY)
+			break;
+
+		/* TODO: use timer uclass (for early calls). */
+		sdelay(5);
+	} while (timeout_us--);
+
+	return ret;
+}
+
+int adc_channel_single_shot(const char *name, int channel, unsigned int *data)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
+	if (ret)
+		return ret;
+
+	ret = adc_start_channel(dev, channel);
+	if (ret)
+		return ret;
+
+	ret = adc_channel_data(dev, channel, data);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int _adc_channels_single_shot(struct udevice *dev,
+				     unsigned int channel_mask,
+				     struct adc_channel *channels)
+{
+	unsigned int data;
+	int channel, ret;
+
+	for (channel = 0; channel <= ADC_MAX_CHANNEL; channel++) {
+		/* Check channel bit. */
+		if (!((channel_mask >> channel) & 0x1))
+			continue;
+
+		ret = adc_start_channel(dev, channel);
+		if (ret)
+			return ret;
+
+		ret = adc_channel_data(dev, channel, &data);
+		if (ret)
+			return ret;
+
+		channels->id = channel;
+		channels->data = data;
+		channels++;
+	}
+
+	return 0;
+}
+
+int adc_channels_single_shot(const char *name, unsigned int channel_mask,
+			     struct adc_channel *channels)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
+	if (ret)
+		return ret;
+
+	ret = adc_start_channels(dev, channel_mask);
+	if (ret)
+		goto try_manual;
+
+	ret = adc_channels_data(dev, channel_mask, channels);
+	if (ret)
+		return ret;
+
+	return 0;
+
+try_manual:
+	if (ret != -ENOSYS)
+		return ret;
+
+	return _adc_channels_single_shot(dev, channel_mask, channels);
+}
+
+static int adc_vdd_platdata_update(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret;
+
+	/* Warning!
+	 * This function can't return supply device before its bind.
+	 * Please pay attention to proper fdt scan sequence. If ADC device
+	 * will bind before its supply regulator device, then the below 'get'
+	 * will return an error.
+	 */
+	ret = device_get_supply_regulator(dev, "vdd-supply",
+					  &uc_pdata->vdd_supply);
+	if (ret)
+		return ret;
+
+	ret = regulator_get_value(uc_pdata->vdd_supply);
+	if (ret < 0)
+		return ret;
+
+	uc_pdata->vdd_microvolts = ret;
+
+	return 0;
+}
+
+static int adc_vss_platdata_update(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret;
+
+	ret = device_get_supply_regulator(dev, "vss-supply",
+					  &uc_pdata->vss_supply);
+	if (ret)
+		return ret;
+
+	ret = regulator_get_value(uc_pdata->vss_supply);
+	if (ret < 0)
+		return ret;
+
+	uc_pdata->vss_microvolts = ret;
+
+	return 0;
+}
+
+int adc_vdd_value(struct udevice *dev, int *uV)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret, value_sign = uc_pdata->vdd_polarity_negative ? -1 : 1;
+
+	if (!uc_pdata->vdd_supply)
+		goto nodev;
+
+	/* Update the regulator Value. */
+	ret = adc_vdd_platdata_update(dev);
+	if (ret)
+		return ret;
+nodev:
+	if (uc_pdata->vdd_microvolts == -ENODATA)
+		return -ENODATA;
+
+	*uV = uc_pdata->vdd_microvolts * value_sign;
+
+	return 0;
+}
+
+int adc_vss_value(struct udevice *dev, int *uV)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret, value_sign = uc_pdata->vss_polarity_negative ? -1 : 1;
+
+	if (!uc_pdata->vss_supply)
+		goto nodev;
+
+	/* Update the regulator Value. */
+	ret = adc_vss_platdata_update(dev);
+	if (ret)
+		return ret;
+nodev:
+	if (uc_pdata->vss_microvolts == -ENODATA)
+		return -ENODATA;
+
+	*uV = uc_pdata->vss_microvolts * value_sign;
+
+	return 0;
+}
+
+static int adc_vdd_platdata_set(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret, offset = dev->of_offset;
+	const void *fdt = gd->fdt_blob;
+	char *prop;
+
+	prop = "vdd-polarity-negative";
+	uc_pdata->vdd_polarity_negative = fdtdec_get_bool(fdt, offset, prop);
+
+	ret = adc_vdd_platdata_update(dev);
+	if (ret != -ENOENT)
+		return ret;
+
+	/* No vdd-supply phandle. */
+	prop  = "vdd-microvolts";
+	uc_pdata->vdd_microvolts = fdtdec_get_int(fdt, offset, prop, -ENODATA);
+
+	return 0;
+}
+
+static int adc_vss_platdata_set(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int ret, offset = dev->of_offset;
+	const void *fdt = gd->fdt_blob;
+	char *prop;
+
+	prop = "vss-polarity-negative";
+	uc_pdata->vss_polarity_negative = fdtdec_get_bool(fdt, offset, prop);
+
+	ret = adc_vss_platdata_update(dev);
+	if (ret != -ENOENT)
+		return ret;
+
+	/* No vss-supply phandle. */
+	prop = "vss-microvolts";
+	uc_pdata->vss_microvolts = fdtdec_get_int(fdt, offset, prop, -ENODATA);
+
+	return 0;
+}
+
+static int adc_pre_probe(struct udevice *dev)
+{
+	int ret;
+
+	/* Set ADC VDD platdata: polarity, uV, regulator (phandle). */
+	ret = adc_vdd_platdata_set(dev);
+	if (ret)
+		error("%s: Can't update Vdd. Error: %d", dev->name, ret);
+
+	/* Set ADC VSS platdata: polarity, uV, regulator (phandle). */
+	ret = adc_vss_platdata_set(dev);
+	if (ret)
+		error("%s: Can't update Vss. Error: %d", dev->name, ret);
+
+	return 0;
+}
+
+UCLASS_DRIVER(adc) = {
+	.id	= UCLASS_ADC,
+	.name	= "adc",
+	.pre_probe =  adc_pre_probe,
+	.per_device_platdata_auto_alloc_size = ADC_UCLASS_PLATDATA_SIZE,
+};

u-boot/drivers/adc/exynos-adc.c

@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2015 Samsung Electronics
+ * Przemyslaw Marczak <p.marczak@samsung.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <adc.h>
+#include <asm/arch/adc.h>
+
+struct exynos_adc_priv {
+	int active_channel;
+	struct exynos_adc_v2 *regs;
+};
+
+int exynos_adc_channel_data(struct udevice *dev, int channel,
+			    unsigned int *data)
+{
+	struct exynos_adc_priv *priv = dev_get_priv(dev);
+	struct exynos_adc_v2 *regs = priv->regs;
+
+	if (channel != priv->active_channel) {
+		error("Requested channel is not active!");
+		return -EINVAL;
+	}
+
+	if (ADC_V2_GET_STATUS_FLAG(readl(&regs->status)) != FLAG_CONV_END)
+		return -EBUSY;
+
+	*data = readl(&regs->dat) & ADC_V2_DAT_MASK;
+
+	return 0;
+}
+
+int exynos_adc_start_channel(struct udevice *dev, int channel)
+{
+	struct exynos_adc_priv *priv = dev_get_priv(dev);
+	struct exynos_adc_v2 *regs = priv->regs;
+	unsigned int cfg;
+
+	/* Choose channel */
+	cfg = readl(&regs->con2);
+	cfg &= ~ADC_V2_CON2_CHAN_SEL_MASK;
+	cfg |= ADC_V2_CON2_CHAN_SEL(channel);
+	writel(cfg, &regs->con2);
+
+	/* Start conversion */
+	cfg = readl(&regs->con1);
+	writel(cfg | ADC_V2_CON1_STC_EN, &regs->con1);
+
+	priv->active_channel = channel;
+
+	return 0;
+}
+
+int exynos_adc_stop(struct udevice *dev)
+{
+	struct exynos_adc_priv *priv = dev_get_priv(dev);
+	struct exynos_adc_v2 *regs = priv->regs;
+	unsigned int cfg;
+
+	/* Stop conversion */
+	cfg = readl(&regs->con1);
+	cfg |= ~ADC_V2_CON1_STC_EN;
+
+	writel(cfg, &regs->con1);
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int exynos_adc_probe(struct udevice *dev)
+{
+	struct exynos_adc_priv *priv = dev_get_priv(dev);
+	struct exynos_adc_v2 *regs = priv->regs;
+	unsigned int cfg;
+
+	/* Check HW version */
+	if (readl(&regs->version) != ADC_V2_VERSION) {
+		error("This driver supports only ADC v2!");
+		return -ENXIO;
+	}
+
+	/* ADC Reset */
+	writel(ADC_V2_CON1_SOFT_RESET, &regs->con1);
+
+	/* Disable INT - will read status only */
+	writel(0x0, &regs->int_en);
+
+	/* CON2 - set conversion parameters */
+	cfg = ADC_V2_CON2_C_TIME(3); /* Conversion times: (1 << 3) = 8 */
+	cfg |= ADC_V2_CON2_OSEL(OSEL_BINARY);
+	cfg |= ADC_V2_CON2_ESEL(ESEL_ADC_EVAL_TIME_20CLK);
+	cfg |= ADC_V2_CON2_HIGHF(HIGHF_CONV_RATE_600KSPS);
+	writel(cfg, &regs->con2);
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int exynos_adc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	struct exynos_adc_priv *priv = dev_get_priv(dev);
+
+	priv->regs = (struct exynos_adc_v2 *)dev_get_addr(dev);
+	if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) {
+		error("Dev: %s - can't get address!", dev->name);
+		return -ENODATA;
+	}
+
+	uc_pdata->data_mask = ADC_V2_DAT_MASK;
+	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+	uc_pdata->data_timeout_us = ADC_V2_CONV_TIMEOUT_US;
+
+	/* Mask available channel bits: [0:9] */
+	uc_pdata->channel_mask = (2 << ADC_V2_MAX_CHANNEL) - 1;
+
+	return 0;
+}
+
+static const struct adc_ops exynos_adc_ops = {
+	.start_channel = exynos_adc_start_channel,
+	.channel_data = exynos_adc_channel_data,
+	.stop = exynos_adc_stop,
+};
+
+static const struct udevice_id exynos_adc_ids[] = {
+	{ .compatible = "samsung,exynos-adc-v2" },
+	{ }
+};
+
+U_BOOT_DRIVER(exynos_adc) = {
+	.name		= "exynos-adc",
+	.id		= UCLASS_ADC,
+	.of_match	= exynos_adc_ids,
+	.ops		= &exynos_adc_ops,
+	.probe		= exynos_adc_probe,
+	.ofdata_to_platdata = exynos_adc_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct exynos_adc_priv),
+};

u-boot/drivers/adc/sandbox.c

@@ -0,0 +1,174 @@
+/*
+ * Copyright (C) 2015 Samsung Electronics
+ * Przemyslaw Marczak <p.marczak@samsung.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <adc.h>
+#include <sandbox-adc.h>
+
+/**
+ * struct sandbox_adc_priv - sandbox ADC device's operation status and data
+ *
+ * @conversion_status - conversion status: ACTIVE (started) / INACTIVE (stopped)
+ * @conversion_mode   - conversion mode: single or multi-channel
+ * @active_channel    - active channel number, valid for single channel mode
+ * data[]             - channels data
+ */
+struct sandbox_adc_priv {
+	int conversion_status;
+	int conversion_mode;
+	int active_channel_mask;
+	unsigned int data[4];
+};
+
+int sandbox_adc_start_channel(struct udevice *dev, int channel)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+
+	/* Set single-channel mode */
+	priv->conversion_mode = SANDBOX_ADC_MODE_SINGLE_CHANNEL;
+	/* Select channel */
+	priv->active_channel_mask = 1 << channel;
+	/* Start conversion */
+	priv->conversion_status = SANDBOX_ADC_ACTIVE;
+
+	return 0;
+}
+
+int sandbox_adc_start_channels(struct udevice *dev, unsigned int channel_mask)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+
+	/* Set single-channel mode */
+	priv->conversion_mode = SANDBOX_ADC_MODE_MULTI_CHANNEL;
+	/* Select channel */
+	priv->active_channel_mask = channel_mask;
+	/* Start conversion */
+	priv->conversion_status = SANDBOX_ADC_ACTIVE;
+
+	return 0;
+}
+
+int sandbox_adc_channel_data(struct udevice *dev, int channel,
+			     unsigned int *data)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+
+	/* For single-channel conversion mode, check if channel was selected */
+	if ((priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) &&
+	    !(priv->active_channel_mask & (1 << channel))) {
+		error("Request for an inactive channel!");
+		return -EINVAL;
+	}
+
+	/* The conversion must be started before reading the data */
+	if (priv->conversion_status == SANDBOX_ADC_INACTIVE)
+		return -EIO;
+
+	*data = priv->data[channel];
+
+	return 0;
+}
+
+int sandbox_adc_channels_data(struct udevice *dev, unsigned int channel_mask,
+			      struct adc_channel *channels)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+	int i;
+
+	/* Return error for single-channel conversion mode */
+	if (priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) {
+		error("ADC in single-channel mode!");
+		return -EPERM;
+	}
+	/* Check channel selection */
+	if (!(priv->active_channel_mask & channel_mask)) {
+		error("Request for an inactive channel!");
+		return -EINVAL;
+	}
+	/* The conversion must be started before reading the data */
+	if (priv->conversion_status == SANDBOX_ADC_INACTIVE)
+		return -EIO;
+
+	for (i = 0; i < SANDBOX_ADC_CHANNELS; i++) {
+		if (!((channel_mask >> i) & 0x1))
+			continue;
+
+		channels->data = priv->data[i];
+		channels->id = i;
+		channels++;
+	}
+
+	return 0;
+}
+
+int sandbox_adc_stop(struct udevice *dev)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+
+	/* Start conversion */
+	priv->conversion_status = SANDBOX_ADC_INACTIVE;
+
+	return 0;
+}
+
+int sandbox_adc_probe(struct udevice *dev)
+{
+	struct sandbox_adc_priv *priv = dev_get_priv(dev);
+
+	/* Stop conversion */
+	priv->conversion_status = SANDBOX_ADC_INACTIVE;
+	/* Set single-channel mode */
+	priv->conversion_mode = SANDBOX_ADC_MODE_SINGLE_CHANNEL;
+	/* Deselect all channels */
+	priv->active_channel_mask = 0;
+
+	/* Set sandbox test data */
+	priv->data[0] = SANDBOX_ADC_CHANNEL0_DATA;
+	priv->data[1] = SANDBOX_ADC_CHANNEL1_DATA;
+	priv->data[2] = SANDBOX_ADC_CHANNEL2_DATA;
+	priv->data[3] = SANDBOX_ADC_CHANNEL3_DATA;
+
+	return 0;
+}
+
+int sandbox_adc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+
+	uc_pdata->data_mask = SANDBOX_ADC_DATA_MASK;
+	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+	uc_pdata->data_timeout_us = 0;
+
+	/* Mask available channel bits: [0:3] */
+	uc_pdata->channel_mask = (1 << SANDBOX_ADC_CHANNELS) - 1;
+
+	return 0;
+}
+
+static const struct adc_ops sandbox_adc_ops = {
+	.start_channel = sandbox_adc_start_channel,
+	.start_channels = sandbox_adc_start_channels,
+	.channel_data = sandbox_adc_channel_data,
+	.channels_data = sandbox_adc_channels_data,
+	.stop = sandbox_adc_stop,
+};
+
+static const struct udevice_id sandbox_adc_ids[] = {
+	{ .compatible = "sandbox,adc" },
+	{ }
+};
+
+U_BOOT_DRIVER(sandbox_adc) = {
+	.name		= "sandbox-adc",
+	.id		= UCLASS_ADC,
+	.of_match	= sandbox_adc_ids,
+	.ops		= &sandbox_adc_ops,
+	.probe		= sandbox_adc_probe,
+	.ofdata_to_platdata = sandbox_adc_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct sandbox_adc_priv),
+};