avionic design with actual uboot and tooling
submodule of avionic design uboot bootloader and with included tools to get you started , read readme.md and readme-tk1-loader.md
This commit is contained in:
20
u-boot/board/zyxel/nsa310s/Kconfig
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20
u-boot/board/zyxel/nsa310s/Kconfig
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#
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# Copyright (C) 2015
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# Gerald Kerma <dreagle@doukki.net>
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# Tony Dinh <mibodhi@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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if TARGET_NSA310S
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config SYS_BOARD
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default "nsa310s"
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config SYS_VENDOR
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default "zyxel"
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config SYS_CONFIG_NAME
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default "nsa310s"
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endif
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8
u-boot/board/zyxel/nsa310s/MAINTAINERS
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8
u-boot/board/zyxel/nsa310s/MAINTAINERS
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NSA310S BOARD
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M: Gerald Kerma <dreagle@doukki.net>
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M: Tony Dinh <mibodhi@gmail.com>
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M: Luka Perkov <luka.perkov@sartura.hr>
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S: Maintained
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F: board/zyxel/nsa310s/
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F: include/configs/nsa310s.h
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F: configs/nsa310s_defconfig
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9
u-boot/board/zyxel/nsa310s/Makefile
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u-boot/board/zyxel/nsa310s/Makefile
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#
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# Copyright (C) 2015
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# Gerald Kerma <dreagle@doukki.net>
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# Tony Dinh <mibodhi@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := nsa310s.o
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43
u-boot/board/zyxel/nsa310s/kwbimage.cfg
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u-boot/board/zyxel/nsa310s/kwbimage.cfg
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#
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# Copyright (C) 2015
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# Gerald Kerma <dreagle@doukki.net>
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# Tony Dinh <mibodhi@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Refer to doc/README.kwbimage for more details about how-to
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# configure and create kirkwood boot images.
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#
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# Boot Media configurations
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BOOT_FROM nand
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NAND_ECC_MODE default
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NAND_PAGE_SIZE 0x0800
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# Configure RGMII-0 interface pad voltage to 1.8V
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DATA 0xFFD100e0 0x1b1b1b9b
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DATA 0xFFD01400 0x43010c30
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DATA 0xFFD01404 0x39543000
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DATA 0xFFD01408 0x22125451
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DATA 0xFFD0140C 0x00000833
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DATA 0xFFD01410 0x0000000C
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DATA 0xFFD01414 0x00000000
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DATA 0xFFD01418 0x00000000
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DATA 0xFFD0141C 0x00000652
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DATA 0xFFD01420 0x00000004
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DATA 0xFFD01424 0x0000F17F
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DATA 0xFFD01428 0x00085520
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DATA 0xFFD0147c 0x00008552
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DATA 0xFFD01504 0x0FFFFFF1
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DATA 0xFFD01508 0x10000000
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DATA 0xFFD0150C 0x00000000
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DATA 0xFFD01514 0x00000000
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DATA 0xFFD0151C 0x00000000
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DATA 0xFFD01494 0x00010000
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DATA 0xFFD01498 0x00000000
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DATA 0xFFD0149C 0x0000E403
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DATA 0xFFD01480 0x00000001
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DATA 0xFFD20134 0x66666666
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DATA 0xFFD20138 0x66666666
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DATA 0x0 0x0
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133
u-boot/board/zyxel/nsa310s/nsa310s.c
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u-boot/board/zyxel/nsa310s/nsa310s.c
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/*
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* Copyright (C) 2015
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* Gerald Kerma <dreagle@doukki.net>
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* Tony Dinh <mibodhi@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/io.h>
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#include "nsa310s.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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/*
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* default gpio configuration
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* There are maximum 64 gpios controlled through 2 sets of registers
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* the below configuration configures mainly initial LED status
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*/
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mvebu_config_gpio(NSA310S_VAL_LOW, NSA310S_VAL_HIGH,
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NSA310S_OE_LOW, NSA310S_OE_HIGH);
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/* (all LEDs & power off active high) */
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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MPP0_NF_IO2,
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MPP1_NF_IO3,
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MPP2_NF_IO4,
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MPP3_NF_IO5,
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MPP4_NF_IO6,
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MPP5_NF_IO7,
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MPP6_SYSRST_OUTn,
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MPP7_GPO,
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MPP8_TW_SDA,
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MPP9_TW_SCK,
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP12_GPO,
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MPP13_GPIO,
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MPP14_GPIO,
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MPP15_GPIO,
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MPP16_GPIO,
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MPP17_GPIO,
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MPP18_NF_IO0,
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MPP19_NF_IO1,
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MPP20_GPIO,
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MPP21_GPIO,
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MPP22_GPIO,
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MPP23_GPIO,
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MPP24_GPIO,
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MPP25_GPIO,
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MPP26_GPIO,
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MPP27_GPIO,
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MPP28_GPIO,
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MPP29_GPIO,
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MPP30_GPIO,
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MPP31_GPIO,
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MPP32_GPIO,
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MPP33_GPIO,
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MPP34_GPIO,
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MPP35_GPIO,
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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u16 reg;
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u16 phyaddr;
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char *name = "egiga0";
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if (miiphy_set_current_dev(name))
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return;
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/* read PHY dev address */
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if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
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printf("could not read PHY dev address\n");
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return;
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}
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/* set RGMII delay */
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miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
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miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, ®);
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reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
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miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
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miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
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/* reset PHY */
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if (miiphy_reset(name, phyaddr))
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return;
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/*
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* ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
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* and has an MCU attached to the LED[2] via tristate interrupt
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*/
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/* switch to LED register page */
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miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
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/* read out LED polarity register */
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miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, ®);
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/* clear 4, set 5 - LED2 low, tri-state */
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reg &= ~(MV88E1318_LED2_4);
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reg |= (MV88E1318_LED2_5);
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/* write back LED polarity register */
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miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
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/* jump back to page 0, per the PHY chip documenation. */
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miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
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/* set PHY back to auto-negotiation mode */
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miiphy_write(name, phyaddr, 0x4, 0x1e1);
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miiphy_write(name, phyaddr, 0x9, 0x300);
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/* downshift */
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miiphy_write(name, phyaddr, 0x10, 0x3860);
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miiphy_write(name, phyaddr, 0x0, 0x9140);
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}
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#endif /* CONFIG_RESET_PHY_R */
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47
u-boot/board/zyxel/nsa310s/nsa310s.h
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47
u-boot/board/zyxel/nsa310s/nsa310s.h
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/*
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* Copyright (C) 2015
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* Gerald Kerma <dreagle@doukki.net>
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* Tony Dinh <mibodhi@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __NSA310S_H
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#define __NSA310S_H
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/* low GPIO's */
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#define HDD1_GREEN_LED (1 << 16)
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#define HDD1_RED_LED (1 << 13)
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#define USB_GREEN_LED (1 << 15)
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#define USB_POWER (1 << 21)
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#define SYS_GREEN_LED (1 << 28)
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#define SYS_ORANGE_LED (1 << 29)
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#define COPY_GREEN_LED (1 << 22)
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#define COPY_RED_LED (1 << 23)
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#define PIN_USB_GREEN_LED 15
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#define PIN_USB_POWER 21
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#define NSA310S_OE_LOW (~(0))
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#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER)
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/* high GPIO's */
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#define HDD2_GREEN_LED (1 << 2)
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#define HDD2_POWER (1 << 1)
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#define NSA310S_OE_HIGH (~(0))
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#define NSA310S_VAL_HIGH (HDD2_POWER)
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/* PHY related */
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#define MV88E1318_PGADR_REG 22
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#define MV88E1318_MAC_CTRL_PG 2
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#define MV88E1318_MAC_CTRL_REG 21
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#define MV88E1318_RGMII_TX_CTRL (1 << 4)
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#define MV88E1318_RGMII_RX_CTRL (1 << 5)
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#define MV88E1318_LED_PG 3
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#define MV88E1318_LED_POL_REG 17
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#define MV88E1318_LED2_4 (1 << 4)
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#define MV88E1318_LED2_5 (1 << 5)
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#endif /* __NSA310S_H */
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