avionic design with actual uboot and tooling
submodule of avionic design uboot bootloader and with included tools to get you started , read readme.md and readme-tk1-loader.md
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3
u-boot/board/intel/galileo/.gitignore
vendored
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3
u-boot/board/intel/galileo/.gitignore
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dsdt.aml
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dsdt.asl.tmp
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dsdt.c
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35
u-boot/board/intel/galileo/Kconfig
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u-boot/board/intel/galileo/Kconfig
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if TARGET_GALILEO
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config SYS_BOARD
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default "galileo"
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config SYS_VENDOR
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default "intel"
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config SYS_SOC
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default "quark"
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config SYS_CONFIG_NAME
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default "galileo"
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config SYS_TEXT_BASE
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default 0xfff10000
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select X86_RESET_VECTOR
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select INTEL_QUARK
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select BOARD_ROMSIZE_KB_1024
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config SMBIOS_PRODUCT_NAME
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default "GalileoGen2"
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help
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Override the default product name U-Boot reports in the SMBIOS
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table, to be compatible with the Intel provided UEFI BIOS, as
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Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
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drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
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it to do different board level configuration.
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This can be "Galileo" for GEN1 Galileo board.
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endif
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6
u-boot/board/intel/galileo/MAINTAINERS
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u-boot/board/intel/galileo/MAINTAINERS
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INTEL GALILEO BOARD
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M: Bin Meng <bmeng.cn@gmail.com>
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S: Maintained
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F: board/intel/galileo/
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F: include/configs/galileo.h
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F: configs/galileo_defconfig
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8
u-boot/board/intel/galileo/Makefile
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u-boot/board/intel/galileo/Makefile
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#
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# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += galileo.o start.o
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obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
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11
u-boot/board/intel/galileo/acpi/mainboard.asl
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u-boot/board/intel/galileo/acpi/mainboard.asl
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Power Button */
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Device (PWRB)
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{
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Name(_HID, EISAID("PNP0C0C"))
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}
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14
u-boot/board/intel/galileo/dsdt.asl
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u-boot/board/intel/galileo/dsdt.asl
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
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{
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/* platform specific */
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#include <asm/arch/acpi/platform.asl>
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/* board specific */
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#include "acpi/mainboard.asl"
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}
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67
u-boot/board/intel/galileo/galileo.c
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u-boot/board/intel/galileo/galileo.c
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/device.h>
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#include <asm/arch/quark.h>
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int board_early_init_f(void)
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{
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return 0;
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}
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/*
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* Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
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*
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* We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this
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* pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata()
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* in the Intel ICH6 GPIO driver where it calls PCI configuration space access
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* APIs which will trigger PCI enumeration process.
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*
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* Check <asm/arch-quark/quark.h> for more details.
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*/
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void board_assert_perst(void)
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{
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u32 base, port, val;
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/* retrieve the GPIO IO base */
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qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
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base = (base & 0xffff) & ~0x7f;
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/* enable the pin */
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port = base + 0x20;
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val = inl(port);
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val |= (1 << 0);
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outl(val, port);
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/* configure the pin as output */
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port = base + 0x24;
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val = inl(port);
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val &= ~(1 << 0);
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outl(val, port);
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/* pull it down (assert) */
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port = base + 0x28;
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val = inl(port);
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val &= ~(1 << 0);
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outl(val, port);
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}
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void board_deassert_perst(void)
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{
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u32 base, port, val;
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/* retrieve the GPIO IO base */
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qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
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base = (base & 0xffff) & ~0x7f;
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/* pull it up (de-assert) */
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port = base + 0x28;
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val = inl(port);
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val |= (1 << 0);
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outl(val, port);
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}
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9
u-boot/board/intel/galileo/start.S
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9
u-boot/board/intel/galileo/start.S
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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.globl early_board_init
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early_board_init:
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jmp early_board_init_ret
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