avionic design with actual uboot and tooling

submodule of avionic design uboot bootloader and with included tools to
get you started , read readme.md and readme-tk1-loader.md

u-boot/board/congatec/conga-qeval20-qa3-e3845/.gitignore

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+dsdt.aml
+dsdt.asl.tmp
+dsdt.c

u-boot/board/congatec/conga-qeval20-qa3-e3845/Kconfig

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+if TARGET_CONGA_QEVAL20_QA3_E3845
+
+config SYS_BOARD
+	default "conga-qeval20-qa3-e3845"
+
+config SYS_VENDOR
+	default "congatec"
+
+config SYS_SOC
+	default "baytrail"
+
+config SYS_CONFIG_NAME
+	default "conga-qeval20-qa3-e3845"
+
+config SYS_TEXT_BASE
+	default 0xfff00000 if !EFI_STUB
+	default 0x01110000 if EFI_STUB
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select X86_RESET_VECTOR if !EFI_STUB
+	select INTEL_BAYTRAIL
+	select BOARD_ROMSIZE_KB_8192
+
+config PCIE_ECAM_BASE
+	default 0xe0000000
+
+endif

u-boot/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS

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+congatec EVAL20-QA3-E3845
+M:	Stefan Roese <sr@denx.de>
+S:	Maintained
+F:	board/congatec/conga-qeval20-qa3-e3845
+F:	include/configs/conga-qeval20-qa3-e3845.h
+F:	configs/conga-qeval20-qa3-e3845_defconfig
+F:	arch/x86/dts/conga-qeval20-qa3-e3845.dts

u-boot/board/congatec/conga-qeval20-qa3-e3845/Makefile

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+#
+# Copyright (C) 2015, Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= conga-qeval20-qa3.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

u-boot/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl

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+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+	Name(_HID, EISAID("PNP0C0C"))
+}
+
+/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */

u-boot/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c

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+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <winbond_w83627.h>
+#include <asm/gpio.h>
+#include <asm/ibmpc.h>
+#include <asm/pnp_def.h>
+
+int board_early_init_f(void)
+{
+	/*
+	 * The FSP enables the BayTrail internal legacy UART (again).
+	 * Disable it again, so that the Winbond one can be used.
+	 */
+	setup_internal_uart(0);
+
+	/* Enable the legacy UART in the Winbond W83627 Super IO chip */
+	winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1),
+			      UART0_BASE, UART0_IRQ);
+
+	return 0;
+}
+
+int arch_early_init_r(void)
+{
+	return 0;
+}

u-boot/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl

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+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+	/* platform specific */
+	#include <asm/arch/acpi/platform.asl>
+
+	/* board specific */
+	#include "acpi/mainboard.asl"
+}

u-boot/board/congatec/conga-qeval20-qa3-e3845/start.S

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+/*
+ * Copyright (C) 2015, Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+	jmp	early_board_init_ret