avionic design with actual uboot and tooling
submodule of avionic design uboot bootloader and with included tools to get you started , read readme.md and readme-tk1-loader.md
This commit is contained in:
15
u-boot/arch/sh/cpu/sh3/Makefile
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15
u-boot/arch/sh/cpu/sh3/Makefile
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2007
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# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
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# (C) Copyright 2007
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# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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extra-y = start.o
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obj-y = cpu.o interrupts.o watchdog.o cache.o
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96
u-boot/arch/sh/cpu/sh3/cache.c
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96
u-boot/arch/sh/cpu/sh3/cache.c
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/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* (C) Copyright 2007
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* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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/*
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* Jump to P2 area.
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* When handling TLB or caches, we need to do it from P2 area.
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*/
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#define jump_to_P2() \
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do { \
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unsigned long __dummy; \
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__asm__ __volatile__( \
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"mov.l 1f, %0\n\t" \
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"or %1, %0\n\t" \
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"jmp @%0\n\t" \
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" nop\n\t" \
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".balign 4\n" \
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"1: .long 2f\n" \
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"2:" \
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: "=&r" (__dummy) \
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: "r" (0x20000000)); \
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} while (0)
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/*
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* Back to P1 area.
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*/
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#define back_to_P1() \
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do { \
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unsigned long __dummy; \
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__asm__ __volatile__( \
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"nop;nop;nop;nop;nop;nop;nop\n\t" \
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"mov.l 1f, %0\n\t" \
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"jmp @%0\n\t" \
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" nop\n\t" \
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".balign 4\n" \
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"1: .long 2f\n" \
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"2:" \
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: "=&r" (__dummy)); \
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} while (0)
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#define CACHE_VALID 1
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#define CACHE_UPDATED 2
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static inline void cache_wback_all(void)
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{
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unsigned long addr, data, i, j;
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jump_to_P2();
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for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
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for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
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addr = CACHE_OC_ADDRESS_ARRAY
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| (j << CACHE_OC_WAY_SHIFT)
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| (i << CACHE_OC_ENTRY_SHIFT);
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data = inl(addr);
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if (data & CACHE_UPDATED) {
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data &= ~CACHE_UPDATED;
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outl(data, addr);
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}
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}
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}
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back_to_P1();
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}
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#define CACHE_ENABLE 0
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#define CACHE_DISABLE 1
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int cache_control(unsigned int cmd)
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{
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unsigned long ccr;
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jump_to_P2();
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ccr = inl(CCR);
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if (ccr & CCR_CACHE_ENABLE)
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cache_wback_all();
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if (cmd == CACHE_DISABLE)
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outl(CCR_CACHE_STOP, CCR);
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else
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outl(CCR_CACHE_INIT, CCR);
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back_to_P1();
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return 0;
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}
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14
u-boot/arch/sh/cpu/sh3/config.mk
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14
u-boot/arch/sh/cpu/sh3/config.mk
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#
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# (C) Copyright 2000-2004
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2007
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# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
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# (C) Copyright 2007
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# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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#
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PLATFORM_CPPFLAGS += -m3
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74
u-boot/arch/sh/cpu/sh3/cpu.c
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74
u-boot/arch/sh/cpu/sh3/cpu.c
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/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* (C) Copyright 2007
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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int checkcpu(void)
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{
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puts("CPU: SH3\n");
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return 0;
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}
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int cpu_init(void)
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{
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return 0;
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}
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int cleanup_before_linux(void)
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{
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disable_interrupts();
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return 0;
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}
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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disable_interrupts();
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reset_cpu(0);
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return 0;
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}
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void flush_cache(unsigned long addr, unsigned long size)
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{
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}
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void icache_enable(void)
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{
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}
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void icache_disable(void)
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{
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}
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int icache_status(void)
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{
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return 0;
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}
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void dcache_enable(void)
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{
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}
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void dcache_disable(void)
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{
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}
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int dcache_status(void)
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{
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return 0;
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}
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void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaaddr)
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{
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/* TODO(sh maintainer): Implement this */
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while (1);
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}
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26
u-boot/arch/sh/cpu/sh3/interrupts.c
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26
u-boot/arch/sh/cpu/sh3/interrupts.c
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/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* (C) Copyright 2007
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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int interrupt_init(void)
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{
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return 0;
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}
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void enable_interrupts(void)
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{
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}
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int disable_interrupts(void)
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{
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return 0;
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}
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65
u-boot/arch/sh/cpu/sh3/start.S
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65
u-boot/arch/sh/cpu/sh3/start.S
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/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* (C) Copyright 2007
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <config.h>
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.text
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.align 2
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.global _start
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_sh_start:
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mov.l ._lowlevel_init, r0
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100: bsrf r0
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nop
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bsr 1f
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nop
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1: sts pr, r5
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mov.l ._reloc_dst, r4
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add #(_sh_start-1b), r5
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mov.l ._reloc_dst_end, r6
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2: mov.l @r5+, r1
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mov.l r1, @r4
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add #4, r4
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cmp/hs r6, r4
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bf 2b
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mov.l ._bss_start, r4
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mov.l ._bss_end, r5
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mov #0, r1
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3: mov.l r1, @r4 /* bss clear */
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add #4, r4
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cmp/hs r5, r4
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bf 3b
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mov.l ._gd_init, r13 /* global data */
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mov.l ._stack_init, r15 /* stack */
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#TODO(sh maintainer): Fix this up to call the correct code
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#mov.l ._sh_generic_init, r0
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#jsr @r0
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nop
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loop:
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bra loop
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.align 2
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._lowlevel_init: .long (lowlevel_init - (100b + 4))
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._reloc_dst: .long reloc_dst
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._reloc_dst_end: .long reloc_dst_end
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._bss_start: .long bss_start
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._bss_end: .long bss_end
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._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE)
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._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
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#._sh_generic_init: .long sh_generic_init
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27
u-boot/arch/sh/cpu/sh3/watchdog.c
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27
u-boot/arch/sh/cpu/sh3/watchdog.c
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@@ -0,0 +1,27 @@
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/*
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* (C) Copyright 2010
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* Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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int watchdog_init(void)
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{
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return 0;
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}
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void reset_cpu(unsigned long ignored)
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{
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/* Address error with SR.BL=1 first. */
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trigger_address_error();
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while (1)
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;
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}
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